The Grandpa uses a microSD card which can be formatted using a standard windows computer.
I'm using windows 10
The format is Fat 32
From the manual:
"The files on the SD
card need to be in the root directory and have specific
names e.g.: P0.wav -P9.wav, PA.wav -PZ.wav etc. The
first letter of the name has to be a capital P and second
letter 0-9 or A-Z (also capital). "
I used Audacity to make my samples compatable with the Grandpa. It's a free piece of software
Samples have to be 22050hz, 16bit, mono wav files.
(they can also be 44.1khz, but the sample rate will not
allow pitch up then).
"You can remove the card from the device without
powering it off. When you put the card back in hold
the UP and DOWN buttons together for 2 seconds to
reboot." ... from the manual
The aim is to digitize a video source and create a posterize effect.
It's really simple.
I'm using the visual cortex to input the video. It is a luma source.
It's also supplying a sync signal to to the Cadet I.
If you don't have a Visual Cortex, use a Cadet III for the video input.
"The Gain control on the ADC goes from non-inverted on the left through
zero to inverted on the right. Set the gain to around 9 o’clock. Adjust
the Bias control on the ADC " (PBalj)
Patch 001a
The Luma input is plugged into the Castle ADC.
The ADC's 3 outputs are plugged into the 3 inputs of the DAC.
And the single Lumin output of the DAC goes into the Cadet II (RGB encoder)
The Cadet II is an output module.
It has 3 inputs ... red , green & blue. Plugging the lumin input into each colour will give the corresponding colour out.
If you plug the lumin into a mult and put each out into the R,G & B input you will get a B/W image.
It is similar to the delay function, however it has the advantage that the program's execution doesn't stall until the delay is over. That is, its good at multitasking.
Millis is actually running in the background all the time. It's a clock.
It returns the number of milliseconds that has passed since the current program was started.
It counts for approximately 49 days, till it overflows and goes back to zero.
Then starts all over again.
It is important to remember that it returns values in unsigned long data types.
Thus you can't use data types like "int"
Below is a link to the classic blink sketch that uses delay.
Some additional patch notes for using the LZX 011 shift register module.
This is a DIY module in Eurorack format.
The patch is a basic experiment using this module. Please let me know if you have any other patches worthy to document.
The lumen out of the Visual cortex is going into the input of the ADC module.
The ADC has 3 outputs. Take one of these (experiment with each as each has a different feel)
and plug into the shift register input. Clock the shift register with the VCO clock module .
The three outs of the shift register are plugged back into the VC (channel B)..... thats it!
One of the great things about building these modules is that the schematics are included.
It's described thus:
"The Counter is a 4-Bit clock counter/divider. Each successive output from Q0 to Q3 is half the frequency of the previous."
It also generates a sequence of numbers in
binary counting order from 0000 to 1111 (0-15) in response to the level changes
of a single clock input. After the counter reaches 1111 the next clock
pulse will return it to 0000. At the end of the count (when it reaches 1111), there is a output pulse at RCO.
The Counter will take an oscillator signal from the vidiot and give you four
divided outputs. /2, /4, /8, /16. And a fifth output that puts out a
pulse when the counter has reached the last number in its count.(Philip)
Finally when used in conjunction with the Clock VCO and the DAC , waveforms can be synthesized.
The Counter module uses a inexpensive SN74HC191N -- it's a TTL Counter/Multiplier/divider logic IC.
It has 4-bit synchronous, reversible, up/down binary counters.
Just experimenting with the LZX Castle shift register... module 110
Some quick patch notes ...............
..
The module has three inputs. Clock, data & reset.
This is my first patch ... really basic.
Lumen from V cortex ------> input of ADC
Data out from the ADC ----> data in of the Shift Register
Clock is from the VCO clock
Reset - use a second oscillator... eg prismatic ray or a sequencer
There are 4 outs.
I plugged three into the V Cortex (no particular order).
----
Thanks to Chris for the following patch:
"put a ramp shape or camera input in to the DATA input.
clock vco to CLK. take d0 out to your monitor. note the position on the
screen. take d1 and it should be one clock cycle to the right from d0.
etc with d2 and d3."
I tried a version of this:
i took the lumen out (from the VC ) into the data input of the shift register.
....
patch 2
---------------------------------------------------------------------- Video Index page
Some build pics of the LZX quad gate module.
This is in Eurorack format.
The LZX official site describes it thus:
"The Quad Gate uses a single quad logic chip and combines them in 4 different ways."
(A single CMOS input/output is called a Logic Gate.)
The Quad gate is similar to the multi gate in that it uses logic gates for
binary combination, but it uses a single gate type (ex. Xor. Depends on
what you build it with. I (Philip) suggest xor). There are 2 sets of 2 inputs.
A1, b1 and a2, b2. These have they're own outputs, out1, out2. But there
are 2 other outputs that are some combination of inputs and outputs to
make further interesting combinations.
The important component is a CMOS logic gate.
I'm using a CD4070BE in this build but alternatives are the CD4011 and CD 4001
The CD4070 is a quad XOR gate.
It has four Exclusive OR gates. It has two inputs per gate.
A true output results if one, and only one, of the inputs to the gate is
true. If both inputs are false (0/LOW) or both are true (1/HIGH), a false output
results.
A way to remember XOR is "one or the other but not both".
------------------------------------------------------------------------------------------------
Alternatives:
The 4001 - NOR gate (NOT - OR)
It's an inverting OR gate.
A true output (1/HIGH) results if both inputs are false (0/LOW).
If either or both inputs are true (1/HIGH), a false output
results.
(this is the reverse of the NAND gate)
Notice the small circle at the output on the schematic symbol. This means that the gate is inverting. Remember that a NOT gate is an inverter.
------------------------------------------------------------------------------------
Alternative:
The CD 4011 - NAND gate (NOT - AND)
It's an inverting AND gate.
This produces a false output (0/LOW) only if all its inputs are true (1/HIGH)
If either or both inputs are true (1/HIGH), a true (1/HIGH) output
results.
(This is the reverse of the NOR gate)
---------------------------------------------------------------------------------------------
So it may be interesting to build these 2 alternatives.
Back to the build.
What's a shift register?
"In digital circuits, a shift register is a cascade of flip flops, sharing the same clock,
in which the output of each flip-flop is connected to the 'data' input
of the next flip-flop in the chain, resulting in a circuit that shifts
by one position the 'bit array'
stored in it, 'shifting in' the data present at its input and 'shifting
out' the last bit in the array, at each transition of the clock input." (wikipedia)
LZX describe this as a 4 position memory module (OR a 4-bit shift register).
The Shift register is like a 1 bit delay. Data goes in, and moves through
the 4 positions based on the clock. D0, through to D3 are the output
positions. Each position is one clock cycle delayed from the last.
tHERE are 3 inputs: Clock, data and reset.
The main IC is a CMOS CD4015
For more on CMOS click here : CMOS
The CD4015 consists of two identical, independent, 4-stage shift registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input.
Only one of the shift registers is used so there might be scope to build a dual 110 module in the future.
Apart from the 4015, the only other major component to buy are the LM6172IN/NOPB.
You need 4 of these.