It is based on the Buchla SOU - source of uncertainity --- the best place for random
CVs and gates.
The 8-bit can produce 4 CVs and 8 gates.
It requires 2 inputs:
1. Clock
2. a signal on at least 1 data input.
Any signal crossing 1V can be used as a clock or data signal.
Leave the clock signal steady and vary the frequency of the signal to the data input.
Also try different wave-shapes such as square, sawtooth or triangle
sOME NLC words of wisdom:
ICs first.
Now for the through hole stuff:
Headers to join the 2 PCBs.
Install the Jacks & LEDs
Links:
- NLC build notes
- NLC blog
- NLC panel - CMOS (Serge format)
- jondent blog - The cipher section of the serge/CMOS panel
..
Works well with Buchla.
.
The upper 9 jacks are trigger outs.
000 to 111 are binary for 0 to 7.
Super serial = ??? Its another trigger out.
CV1 to CV4 are outputs.
The CV outputs are all related to each other but are all different; part of CV1 is fed to CV2, part of CV2 is fed to CV3 etc.
The lower row are all inputs.
"The strobe input makes it a bit like an 8 bit sample and hold.
If nothing is inserted into the strobe jack the module carries on as normal. When a signal is introduced to strobe, the data obtained from the data jack is only loaded onto the outputs when the signal is high. "
-----------------------------------------------------------------------------------
You can find more NLC builds here.
---------------------------------------------------------------------------------------
No comments:
Post a Comment